Automotive Microcontroller Unit (MCU) and Application Scenario Research Report, 2026
Automotive MCU Research: Increased demand for redundant security drives ASIL D-compliant MCU shipments to exceed 100 million units
In a vehicle EEA, MCUs are widely distributed in various functional domains of automobiles, undertaking tasks such as functional safety monitoring, real-time control, sensor preprocessing, communication power supply management, and watchdog tasks. The functional safety level ranges from ASIL A to ASIL D according to different functional domains and tasks. Systems related to the autonomous driving domain and the chassis domain generally require ASIL D as they are directly related to driving safety. Moreover, due to the evolution of subsystem solutions, the number of MCUs and the tasks they undertake will vary. However, vehicle MCUs show tend to evolve from a distributed ECU architecture to a central + zone redundant multi-MCU architecture. Moreover, MCU performance is also constantly improving.
As the penetration rate of new energy vehicles continues to increase, China's automotive-grade MCU market is still showing an upward trend. It is estimated that 850-900 million MCUs were installed in passenger cars in China in 2025, with a market size of RMB26.91 billion. Moreover, the proportion of MCUs that meet ASIL D continues to grow. The shipments of ASIL D-compliant MCUs in China's passenger car market was estimated to be around 100 million units in 2025, and the figure will further increase to 180 million units in 2030.
The technological evolution of brake-by-wire systems has significantly raised the requirements for MCU redundancy, functional safety, and real-time performance.
Brake-by-wire is the core execution layer of the intelligent chassis. It replaces traditional hydraulic/mechanical connections with electronic signals to achieve millisecond-level response to and precise control over braking commands, providing a redundant safety cornerstone for autonomous driving. The technology path herein is evolving from EHB to dry EMB.
An EHB (Electro-Hydraulic Brake) system consists of a brake pedal module, a control unit and a hydraulic control module. It is currently the mainstream brake-by-wire solution on the market. Compared with the traditional braking system, the "brake-by-wire" of EHB is mainly reflected in the fact that the connection between the driver's pedal and the ECU of the braking system has been changed from a mechanical connection to an electrical signal connection, but the brake actuator still retains the hydraulic system. According to the integration level of the EHB system, it boasts two control strategies: "Two-box" and "One-box":
A Two-box EHB system generally consists of a motor, a mechanical reduction mechanism, a master cylinder, a sensor, and two independent ECUs. Therefore, it generally requires two MCUs, or two MCUs plus a redundant monitoring MCU. MCUs should meet ASIL-D, real-time closed-loop, millisecond-level redundancy and other requirements.
A One-box EHB system integrates iBooster and ESP in the form of the original Two-box, only requiring one ECU and one braking unit, with higher integration and reduced size and weight. Moreover, it can independently regulate wheel cylinder hydraulic pressure, thereby realizing vehicle stability control functions such as ABS, ESC and TCS. The system uses one MCU, fewer than the two-box solution, yet the performance requirements remain the same.
Electro-Mechanical Brake (EMB) further simplifies the braking structure on the basis of EHB. It cancels the original brake master cylinder and hydraulic pipeline of EHB and integrates the motor directly on the brake. The motor pushes the brake piston and allows the brake caliper to clamp the brake disc to achieve braking.
In order to meet ASIL-D, EMB architecture design is critical. Redundant backup design must be adopted for ECUs, power supplies, communication lines and other components. In terms of ECU layout, a small number of systems discard the controller integrated within the EMB actuator but integrate control functions into a centralized duplex module. More commonly, systems adopt four actuator ECUs.
Current EMB requires approximately six MCUs. These MCUs do not target high TOPS; instead, priorities include a 200 MHz+ clock frequency, lockstep cores, ASIL-D compliance, microsecond-level FOC current loops, redundant multi-channel CAN-FD/FlexRay communication, high-resolution PWM/ADC, and 48V compatibility. Combined with dual power supplies, dual-winding motors and mechanical self-locking, they form a complete fail-operational system.
For example, SemiDrive announced mass production of the flagship intelligent MCU, E3650, in October 2025. It has been appointed by many leading OEMs, covering four major scenarios: vehicle zonal control, VMC, intelligent cockpit/autonomous driving domain control, and powertrain domain control.
Performance highlights: 4 pairs of 600MHz ARM Cortex-R52+ lock-step multi-core clusters, 16MB automotive-grade MRAM, virtualization. The computing power is nearly 40% higher than products of the same grade;
Security level: AEC-Q100 Grade 1 and ISO 26262 ASIL D, Xuanwu ultra-safe HSM, ISO 21434, Evita Full and above information security standards;
Communication capabilities: Fully self-developed SSDPE, multi-channel CAN FD concurrency with zero packet loss, suitable for high-frequency communication of chassis-by-wire multi-sensors and actuators;
Cross-domain integration: A single chip can realize safe isolation and coordinated scheduling of multi-system (body, chassis, and powertrain) services, adapting to the trend of ZCUs integrating chassis-by-wire functions.
Moreover, the automotive EEA continues to evolve towards a central computing platform. In addition to the "central cerebrum" composed of intelligent cockpit and autonomous driving, vehicle control tasks related to body, connectivity, powertrain, and chassis motion coordination are gradually converging upward from the current zone layer to form a "central intelligent control cerebellum". This requires a more powerful and robust safety computing foundation.
SemiDrive created the "AMU (Architecture Master Unit)", a super computing power foundation for the complex central cerebellum. AMU goes beyond traditional ordinary MCUs as an ultra-highly integrated, more powerful and secure real-time computing platform. On the basis of chips, it integrates SemiDrive's deep system optimization capabilities and leading software capabilities to deliver software and hardware collaborative solutions to OEMs. In April 2026, SemiDrive launched two AMU solutions for "central intelligent control cerebellum": Flagship AMU E3800 and Gemini AMU E3650-E.
E3800 integrates more than 10 cores on a single chip, boasts strong secure real-time computing power, introduces aerospace-grade advanced embedded storage, and performs 10 to 20 times better than that of traditional eflash. For the scenario requirements of the central cerebellum, E3800 features specially enhanced network communication capabilities. It is equipped with high-bandwidth Ethernet, an integrated multi-port switch, and multi-layer network acceleration engines. Through the innovation of the underlying layer architecture, E3800 allows the CPU and NPU to realize deep coupling and collaborative work in the pipeline, comprehensively improving the real-time intelligent processing capabilities of the central cerebellum.
Gemini AMU is a combination of two E3650 flagship chips connected on a common board. Using SemiDrive’s “SemiLink” communication optimization technology, the latency in cross-chip communication is reduced to microseconds. When OEMs carry out actual high-level development, they can achieve the same minimalist development and smooth experience as with a single-chip solution. The core advantage of Gemini AMU is its excellent flexibility, which allows OEMs to flexibly expand computing power from 10 to 16 cores like building blocks. Especially today, the vehicle EEA is iterating rapidly and the requirements have not yet fully converged. Gemini AMU can help OEMs conduct incremental iteration and agile verification, enabling more relaxed development of new architectures and gaining time for vehicle intelligence.
The mainstream choice for the next generation of intelligent BMS domain controllers is evolving towards high-performance multi-core MCUs or MCU+MPU heterogeneous architectures.
The next-generation centralized domain control BMS architecture uses a high-performance domain control motherboard (possibly using a multi-core MCU), which directly takes over all functions of the original BMU and integrates some of the VCU's energy management functions and even fuses gateway functions.
High-performance multi-core MCU: For example, Infineon's TC4xx, which has multiple lock-step cores (for ASIL-D safety tasks) and performance cores, can not only meet the highest requirements of functional safety, but also provide considerable computing power for algorithms.
MCU+MPU heterogeneous architecture: This is a more forward-looking choice. The MCU (such as Cortex-R) specializes in handling high-real-time, high-security tasks (such as OVP, short-circuit protection). The MPU (such as Cortex-A) runs a rich operating system (such as Linux) and is responsible for complex algorithms, network communications, diagnostic services and HMI interfaces. This architecture takes into account real-time security and intelligent computing.
In 2026, Infineon launched the PSOC? 4 HVPA-SPM 1.0, an advanced MCU designed for high-voltage Li-ion battery management in electric vehicles (xEVs). This MCU combines precision, safety, and programmability, while supporting zonal architectures and the transition to Software-Defined Vehicles (SDVs).
The PSOC 4 HVPA-SPM 1.0 offers a fully integrated design with key features that bring advanced intelligence, safety, and efficiency to BMS. It provides high-precision monitoring of current, voltage, and temperature, ensuring reliable battery performance and improving the accuracy of State-of-Charge (SoC) and State-of-Health (SoH). Fully compliant with ASIL D (ISO 26262) safety standards, the MCU ensures robust and reliable operation in critical high-voltage battery systems. Its built-in Arm? Cortex?-M0+ processor delivers advanced edge intelligence, enabling faster data processing and reducing the load on the central Electronic Control Unit (ECU). Moreover, the MCU supports zonal architectures and allows OEMs to customize the system for specific requirements, leading to shorter development cycles and faster time-to-market.
Under the zonal architecture, the MCU-less solution is being promoted in some scenarios
With improved domain controller performance and high-speed, stable long-range communication enabled by automotive Ethernet, the MCU-less solutions that remove local MCUs for lamps and transfer full control to ZCUs have attracted attention from vendors. In the development trend of software-defined vehicles, the MCU-less lighting control architecture integrates lighting algorithms into the vehicle's ZCUs, avoiding the lighting controller's computing power requirements for the MCU and meeting customer demand for cost, efficiency, and high integration.
Significant cost reduction: Local MCUs, crystal oscillators, some PMICs and other peripheral components inside lamps are eliminated, cutting BOM cost and hardware complexity;
The communication rate has been greatly improved: Ethernet replaces CAN-FD to increase communication bandwidth, reduce latency, and support more complex real-time headlight control and image data transmission;
The MCU-less solution reconstructs the system architecture and helps OEMs achieve functional differentiation: After the MCU-less solution is adopted, the control logic is completely restored to ZCUs. OEMs can independently define lighting logic and combine autonomous driving data to attain smarter lighting interaction, truly moving towards "software-defined lighting". Tier 1 suppliers focus more on drive design and interfaces, with clearer division of labor and faster response.
onsemi's MCU-less solution adopts a flattened architecture of "HPC - 10BASE-T1S Ethernet - RCP - LED driver". The HPC connects directly to the RCP, with 10 Mbps Ethernet replacing the traditional CAN bus. This solution significantly optimizes hardware: it eliminates components such as node MCUs, reset circuits and crystal oscillators, and can connect 8 to 40 nodes on a 25-meter unshielded twisted pair. It uses PoDL technology for power supply and communication through two wires at the same time, reducing the wiring harness cost by more than 50% and simplifying the system. In terms of performance, the 10Base-T1S Ethernet rate reaches 10 Mbps, far exceeding CAN/CAN FD. The RCP integrates the gPTP protocol to achieve nanosecond-level clock synchronization and ensure coordinated control of the entire vehicle lighting.
With TLD7002-16ES, Infineon has proposed an automotive lighting solution that uses the UART OVER CAN communication interface to reduce costs and improve EMC performance. TLD7002-16ES is an intelligent 16-channel LED driver with a 2 Mbit/s HSLI interface (CAN OVER UART). It can be used as a gateway to control other external LED drivers. By acting as a UART-over-CAN gateway, TLD7002-16ES can directly drives 16 LEDs, and then cascades external drivers, eliminating all MCUs, crystal oscillators, and reset circuits on the light board, while retaining PWM, diagnosis, current expansion, thermal balance, and nanosecond synchronization, thus realizing the MCU-less architecture of the automotive light ECU. This design reduces hardware complexity by 40% and wiring harnesses by 25%, promoting innovation in domain-centralized electrical design. Moreover, it can better meet the dynamic configuration requirements of software-defined vehicles (SDVs) for the lighting system. The single-chip integrated solution replaces traditional discrete design and reduces BOM cost by 30%.
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