ADAS/AD Chip Industry Research Report, 2022
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Autonomous driving chip research: In addition to computing power, core IP, software stacks, AI training platforms, etc. are becoming more and more important

L2.5 and L2.9 have achieved mass production for vehicles running on the road, and mass production of L3 and L4 in limited scenarios has become a goal for OEMs in the next stage. In March 2022, the U.S. National Highway Traffic Safety Administration (NHTSA) issued final rules eliminating the need for automated vehicle manufacturers to equip fully autonomous vehicles with manual driving controls to meet crash standards. The United States is expected to introduce more important policies for autonomous driving in the future to guide L3/L4 autonomous driving on the road.

In this context, ADAS/autonomous driving chips have seen a wave of upgrades, and many chip makers have launched or planned to unveil high computing power chips. In January 2022, Mobileye introduced the EyeQ? Ultra?, the company’s most advanced, highest performing system-on-chip (SoC) purpose-built for autonomous driving. As unveiled during CES 2022, EyeQ Ultra maximizes both effectiveness and efficiency at only 176 TOPS, with 5 nanometer process technology. Although it looks less potent than chips from rivals Qualcomm and NVIDIA, the cost-effective and high-energy-efficiency EyeQ? Ultra? may still be favored by OEMs.


In addition to computing power, self-developed core IP is the focus of competition for major SoC vendors

SoC chips, which are mostly involved with heterogeneous design, include different computing units such as GPU, CPU, acceleration core, NPU, DPU, ISP, etc. Generally speaking, computing power cannot be simply evaluated from the chip alone. Chip bandwidth, peripherals, memory, as well as energy efficiency ratio and cost should be also taken into account. At the same time, the development tool chain of SoC chips is very important. Only by forming a developer ecosystem can a company build long-term sustainable competitiveness.

In chip design, the configuration of heterogeneous IP is crucial, and autonomous driving SoC chip vendors are constantly strengthening the research and development of core IP to maintain their decisive competitive edges. For example, NVIDIA upgraded its existing GPU-based product line to a three-chip (GPU+CPU+DPU) strategy:

? GPU: NVIDIA enjoys superiority in GPU and image processing derived from GPU;
? DPU: NVIDIA announced the completion of its acquisition of Mellanox Technologies, Ltd., an Israeli chip company, for a transaction value of $7 billion and launched the BlueField?-3 data processing unit (DPU). DPU is a programmable electronic component with the versatility and programmability of a central processing unit (CPU), dedicated to efficiently handling network data packets, storage requests or analysis requests;
? In terms of CPU, NVIDIA intended to acquire the semiconductor IP semiconductor ARM as an extension of its three-chip strategy, but it failed in the end. However, NVIDIA launched the Grace? CPU, an Arm-based processor that will deliver 10x the performance of today’s fastest servers on the most complex AI and high-performance computing workloads. NVIDIA's next-generation SOC, Atlan, is based on the ARM-based Grace CPU and Ampere Next GPU.


In terms of domestic vendors, Black Sesame Technologies has launched self-developed NeuralIQ ISP and DynamAI NN engine which is a deep neural network algorithm platform.


Cross-domain fusion and central computing platform chips will lead the evolution of the automotive EEA

Amid the evolution trend of the automotive EEA: "distributed architecture - domain centralized architecture - cross-domain fusion architecture - central computing platform", Tesla's latest version of Model X has achieved a certain degree of central cross-domain fusion computing. Model X's automotive central computing platform includes two FSD chips, an AMD Ryzen CPU chip and an AMD RDNA2 GPU. The FSD chip and AMD CPU/GPU chip communicate through the PCIe interface and are isolated from each other.

Integrating multiple chips such as CPU, GPU, and FSD into one SoC chip through Chiplet technology will further reduce the chip communication delay. Tesla has reportedly partnered with Samsung on a new 5nm chip for autonomous driving and cockpit SoC chip integration.

The industry’s giants like NVIDIA and Qualcomm have all begun to implement cross-domain integration of autonomous driving and cockpits. For example, NVIDIA has launched DRIVE Concierge and DRIVE Chauffeur for smart cockpits and autonomous driving respectively. DRIVE IX can realize the fusion of algorithms in the cockpit. Based on the powerful software stack tools, NVIDIA's next-generation Ampere architecture (Atlan SoC) will conduct the simultaneous control over autonomous driving and intelligent cockpit with a single chip.

In February 2022, Chinese SoC company Horizon Robotics announced that it will cooperate with UAES to preinstall and mass-produce cross-domain integrated automotive computing platforms.


SoC vendors accelerate the layout of autonomous driving AI data training

Autonomous driving datasets are critical for training deep learning models and improving algorithm reliability. SoC vendors have launched self-developed AI training chips and supercomputing platforms. Tesla has launched the AI training chip D1 and the "Dojo" supercomputing platform, which will be used for the training of Tesla's autonomous driving neural network.

Besides, training algorithm models are becoming more and more important, including 2D annotation, 3D point cloud annotation, 2D/3D fusion annotation, semantic segmentation, target tracking, etc., such as the NVIDIA Drive Sim autonomous driving simulation platform, the Horizon Robotics "Eddie" data closed loop training platform, etc.

Foreign chip vendors:

? Tesla has launched Dojo supercomputing training platform, using Tesla's self-developed 7nm AI training chip D1 and relying on a huge customer base to collect autonomous driving data, so as to achieve model training for deep learning systems. At present, Tesla Autopilot mainly uses 2D images + annotations for training and algorithm iteration. Through the Dojo supercomputing platform, Autopilot can fulfill training through 3D images + time stamps (4D Autopilot system). The 4D Autopilot system will be predictable, and mark the 3D movement trajectory of road objects to enhance the reliability of autonomous driving functions.

? NVIDIA has announced NVIDIA Omniverse Replicator, an engine for generating synthetic data with ground truth for training AI networks. NVIDIA also has the most powerful training processor - the NVIDIA A100.

? The map data of Mobileye's REM has covered the world. In China, Mobileye has solved the compliance problem of map data collection in China through a joint venture with Tsinghua Unigroup. Intel acquired Moovit to enhance the strength and data differentiation of REM, extend the traditional HD map data from the roadside to the user side, start from the perception redundancy of assisted autonomous driving and improve the efficiency of path planning. Intel launched its self-developed flagship AI chip - Ponte Vecchio, which will spread to Mobileye's EyeQ6 (planned for mass production in 2023). In the field of AI and servers, Intel will challenge Nvidia with CO-EMIB technology.

Domestic chip vendors:

? In order to solve the long-tail problem of autonomous driving, Horizon Robotics has built a complete data closed-loop platform to iterate algorithms and improve system capabilities. Horizon Robotics has launched the "Eddie" data closed loop training platform.

? Huawei has introduced "Octopus" autonomous driving open platform, focusing on the four most critical elements of autonomous driving development - hardware, data, algorithms and HD maps to build a data-centric open platform which prompts closed-loop iterations of autonomous driving. Huawei's Ascend 910 competes with the NVIDIA A100 as the world's top AI training chip. Huawei has also launched the AI training cluster Atlas 900.


The world's leading autonomous driving AI training chips include: Intel Ponte Vecchio, NVIDIA A100, Tesla D1, Huawei Ascend 910, Google TPU (v1, v2, v3), Cerebras Wafer-Scale Engine, Graphcore IPU, etc.



Chapter 1 Autonomous Driving (AD) Chip Industry Overview
1.1 Introduction of ADAS/AD SoC Chip
1.1.1 Overall Architecture of Intelligent Vehicle Automotive Computing Platform
1.1.2 Evolution of Automotive EE Architecture Promotes Autonomous Driving Computing Platform Development
1.1.3 Composition of Automotive SoC Computing Chip
1.1.4 Automotive SoC Computing Chip: AI Acceleration Chip
1.1.5 Heterogeneous Design of SoC Chip Vendors (1)
1.1.6 Heterogeneous Design of SoC Chip Vendors (2)
1.1.7 Heterogeneous Design of SoC Chip Vendors (3)
1.1.8 Heterogeneous Design of SoC Chip Vendors (4)
1.1.9 Continuous Increase of SoC Master Chip Computing Power Demand
1.1.10 High Performance SoC Master Chip BOM Cost Breakdown: e.g. XXX Master Chip
1.1.11 Overall Cost of Tesla HW3.0 Controller Drops 20%
1.1.12 Cost Estimation of High Performance SoC Master Chip
1.2 ADAS/AD SoC Chip Vendors and Products Comparison
1.2.1 Comparison of Global ADAS/AD SoC Chip Vendors and Product Performance Parameters (1)
1.2.2 Comparison of Global ADAS/AD SoC Chip Vendors and Product Performance Parameters (2)
1.2.3 Comparison of Global ADAS/AD SoC Chip Vendors and Product Performance Parameters (3)
1.2.4 Comparison of Global ADAS/AD SoC Chip Vendors and Product Performance Parameters (4)
1.2.5 Comparison of Global ADAS/AD SoC Chip Vendors and Product Performance Parameters (5)
1.2.6 Comparison of Global ADAS/AD SoC Chip Vendors and Product Performance Parameters (6)
1.2.7 Comparison of Global ADAS/AD SoC Chip Vendors and Product Performance Parameters (7)
1.2.8 Comparison of Global ADAS/AD SoC Chip Vendors and Product Performance Parameters (8)
1.3 Requirements on Auto-grade ADAS/AD SoC Chip
1.3.1 Basic Requirements for Auto-grade Chip
1.3.2 Threshold for Access to Auto-grade Chip and Industry Barriers
1.3.3 Elements for Auto-grade Chip Appraisal: Performance, Price and Power Consumption
1.3.4 Automobile Supply Chain Standard System Criteria Which Auto-grade Chips Have to Meet (1)
1.3.5 Automobile Supply Chain Standard System Criteria Which Auto-grade Chips Have to Meet (2)

Chapter 2 Autonomous Driving Chip Development Trends
2.1 Trend 1: SoC Chips Compete for ISP
2.1.1 Value and Significance of ISP Image Processor
2.1.2 Automotive ISP Image Processor Layout of ARM
2.1.3 Qualcomm Snapdragon Ride Platform
2.1.4 ISP and CNN Merged into a Unified NNA
2.1.5 Tesla without ISP: Achieve AD Overall Architecture with Pure Vision Technology
2.1.6 Layout of AD SoC Vendors: Typical Solutions for Integrated ISPs (1)
2.1.7 Layout of AD SoC Vendors: Typical Solutions for Integrated ISPs (2)
2.1.8 Layout of AD SoC Vendors: Typical Solutions for Integrated ISPs (3)
2.1.9 Layout of AD SoC Vendors: Typical Solutions for Integrated ISPs (4)
2.1.10 Layout of Software Vendors: Introducing Computer Imaging Technology into Automotive ISPs
2.1.11 Layout of CMOS Vendors: ISP 2-in-1 Auto-grade CMOS Image Sensor

2.2 Trend 2: SoC Cross-domain Fusion Computing
2.2.1 AD SoC Vendors: Layout of Cross-domain Fusion Computing (1)
2.2.2 AD SoC Vendors: Layout of Cross-domain Fusion Computing (2)
2.2.3 Cross-domain Fusion High-performance Computing Software Platform of Enjoy Move

2.3 Trend 3: SoC Vendors Accelerated Layout Autonomous Driving AI Data Training
2.3.1 Autonomous Driving SoC Vendors: Layout of Data Closed-loop Training Platform (1)
2.3.2 Autonomous Driving SoC Vendors: Layout of Data Closed-loop Training Platform (2)
2.3.3 Comparison of Autonomous Driving AI Training Chips

2.4 Trend 4: SoC Vendors Accelerated Transformation to Tier 0.5
2.4.1 Former Tier 2 Automotive Chip Vendors Became Core Suppliers
2.4.2 SoC Vendors Further Transformed to Tier 0.5
2.4.3 Self-developed 4D Imaging Radar System of Mobileye
2.4.4 Mobileye Provided AD Kit Including Chip/Vision/Radar
2.4.5 Qualcomm Acquired Veoneer

Chapter 3 Research on Global AD Chip Vendors
3.1.1 Overview of NVIDIA Products NVIDIA's Operations by Business in 2021 (1) NVIDIA's Operations by Business in 2021 (2) NVIDIA's Strategic Architecture: GPU+CPU+DPU NVIDIA GPU Architecture: Ampere NVIDIA GPU Architecture: Technology Evolution NVIDIA DPU Architecture: Technology Evolution of Bluefield NVIDIA AD Chip Strategic Direction NVIDIA AD SoC Products Lines NVIDIA AD Computing Platform Products Lines (1) NVIDIA AD Computing Platform Products Lines (2) Performance Parameters Comparison of NVIDIA Autonomous Driving Chips in Previous Generations
3.1.2 NVIDIA Atlan SoC Chips NVIDIA Atlan SoC NVIDIA Atlan SoC CPU NVIDIA Atlan SoC DPU Functional Safety Islands of NVIDIA Atlan SoC
3.1.3 NVIDIA ORIN SoC Chip NVIDIA ORIN SoC NVIDIA ORIN SoC: System Framework Diagram NVIDIA ORIN SoC: Adopts Scalable and Compatible Architecture NVIDIA ORIN SoC: 3 Typical Products
3.1.4 NVIDIA Xavier SoC Chips NVIDIA Xavier SoC: Performance Parameters NVIDIA Xavier SoC: System Framework Diagram
3.1.5 NVIDIA Autonomous Driving Computing Platforms NVIDIA New Generation Autonomous Vehicle Platform: Drive Hyperion 8 NVIDIA Drive Hyperion 8.1: Development Platform Architecture for L2+ (1) NVIDIA Drive Hyperion 8.1: Development Platform Architecture for L2+ (2) NVIDIA Drive Hyperion 8.1: Development Platform Architecture for L2+ (3) NVIDIA Drive Hyperion 8.1: Development Platform Architecture for L2+ (4)
............................ NVIDIA AD Computing Platform: DRIVE AutoPilot (for L2+)
3.1.6 NVIDIA AD Supporting Software NVIDIA AD Full Stack Tool Chain NVIDIA AD Software Stack (1) NVIDIA AD Software Stack (2) NVIDIA AD Software Stack:  Functions (1) NVIDIA AD Software Stack: Functions (2) NVIDIA AD Software Stack:  Functions (3) NVIDIA DRIVE AP2X Software Solutions NVIDIA Autonomous Driving Simulation Platform NVIDIA AI Assisted Driving Platform NVIDIA In-vehicle AI Assistant
3.1.7 NVIDIA AD Chip Consumers NVIDIA Core Customer Group NVIDIA AD Chip Ecology

3.2 Intel/Mobileye
3.2.1 Autonomous Driving Division of Intel
3.2.2 Intel became the World's First Full-chain Chip Vendor for OEMs
3.2.3 Intel Transformed to IDM2.0 Mode
3.2.4 Intel Planned to Start Foundry Automotive Chips in 2022
3.2.5 Mobileye Solutions
3.2.6 Mobileye Chip Shipments
3.2.7 Intel/Mobileye ADAS/AD Chip Products Portfolio (1)
3.2.8 Intel/Mobileye ADAS/AD Chip Products Portfolio (2)
3.2.9 Intel/Mobileye ADAS/AD Chip Products Portfolio (3)
3.2.10 Mobileye’s Autonomous Driving Strategy
3.2.11 Mobileye EyeQ Product Line: Typical Technical Parameters
3.2.12 Mobileye Launched the 7th-Gen Products
3.2.13 EyeQ? Ultra? System Architecture
3.2.14 Mobileye Launched EyeQ? 6L/6H SoC
3.2.15 EyeQ6H Chip Architecture
3.2.16 EyeQ6L Chip Architecture
3.2.17 Mobileye EyeQ5 Chip: System Framework
3.2.18 Mobileye EyeQ5 Chip: Function Modules
3.2.19 Mobileye EyeQ5 Chip: Open Platform
3.2.20 Mobileye EyeQ4 Chip
3.2.21 Mobileye EyeQ4 Chip Functions and Parameters
3.2.22 Mobileye L2+ SuperVision System Solution
3.2.23 Mobileye L2+ SuperVision Computing Platform Architecture Solution
3.2.24 Mobileye L2+ SuperVision System Framework
3.2.25 Mobileye L4 Mobileye Drive
3.2.26 Mobileye L4 Mobileye Drive System Design Architecture
3.2.27 Mobileye Road Experience Management (REM)
3.2.28 Mobileye Map Data Collection Solution
3.2.29 Mobileye Achieved deep Collaboration with Major Customers such as ZEEKR, Ford and Volkswagen
3.2.30 Mobileye EyeQ Product Line and Its Integration with INTEL System
3.2.31 Mobileye Eye6 Adopted Intel Atom
3.2.32 Mobileye Self-developed 4D Imaging Radar
3.2.33 Mobileye 4D Imaging Radar System Design and Performance Index
3.2.34 Mobileye Software Defined Imaging Radar Point Cloud
3.2.35 Mobileye Core Customers for AD Solutions
3.2.36 Layout of Mobileye L4 Mobility

3.3 TI
3.3.1 Profile
3.3.2 TI Spend $30 billion on Four New Semiconductor Factories
3.3.3 TI’s Launch of ADAS-related Products
3.3.4 TI ADAS/AD Chip Products Portfolio (1)
3.3.5 TI ADAS/AD Chip Products Portfolio (2)
3.3.6 TI’s Launch of Next-generation Automotive Processor Platform
3.3.7 TI Jacinto 7 System Architecture
3.3.8 TI’s ADAS Chip -- TDAx
3.3.9 IT TDA4VM SoC: Technical Features (1)
3.3.10 IT TDA4VM SoC: Technical Features (2)
3.3.11 IT TDA4VM SoC: Technical Architecture
3.3.12 IT TDA4VM SoC: Application Field
3.3.13 IT TDA4VM SoC Applications (1)
3.3.14 IT TDA4VM SoC Applications (2)
3.3.15 IT TDA4VM SoC Applications (3)
3.3.16 IT TDA4VM SoC Applications (4)
3.3.17 IT TDA4VM SoC Applications (5) 
3.3.18 TI Automotive Radar Chip
3.3.19 TI the 2nd-Gen Radar Single Chip
3.3.20 TI 4D Imaging Radar Chip

3.4 NXP
3.4.1 Operation of NXP in 2021
3.4.2 NXP ADAS/AD Chip Products Portfolio (1)
3.4.3 NXP ADAS/AD Chip Products Portfolio (2)
3.4.4 NXP S32x Series Chip Product Line
3.4.5 NXP S32 ADAS Chip
3.4.6 NXP S32 ADAS Chip Technology Roadmap
3.4.7 Features of NXP S32V2/ S32V3 ADAS Chip Architecture
3.4.8 Block Diagram of ADAS System Based on S32 V234
3.4.9 NXP S32V3 Binocular Vision Chip
3.4.10 NXP AD Auto-grade AI Tools Software Development Kit
3.4.11 NXP AD Computing Platform Bluebox (1)
3.4.12 NXP AD Computing Platform Bluebox (2)
3.4.13 NXP AD Computing Platform Bluebox (3)
3.4.14 NXP 4D Imaging Radar Chipset S32R45
3.4.15 NXP 4D Imaging Radar Chipset S32R41
3.4.16 NXP ADAS/AD Chip Partners and Use Cases

3.5 Renesas
3.5.1 Operation of Renesas
3.5.2 Renesas Automotive Chip Business
3.5.3 Renesas Expanded Automotive Product Line with Acquisition of Dialog
3.5.4 Renesas Will Help Build Integrated Platform of the Automakers/Tier1s on Future EE architecture
3.5.5 Renesas Automotive Chip: Capacity Expansion Plan
3.5.6 Renesas Automotive Chip: R-Car Series
3.5.7 Renesas ADAS/AD Chip Products Portfolio (1)
3.5.8 Renesas ADAS/AD Chip Products Portfolio (2)
3.5.9 Renesas R-Car V3U SoC
3.5.10 Renesas R-Car V3U SoC Internal Framework (1)
3.5.11 Renesas R-Car V3U SoC Internal Framework (2)
3.5.12 Renesas R-Car V3U SoC (1)
3.5.13 Renesas R-Car V3U SoC (2)
3.5.14 Renesas R-Car V3U SoC (3)
3.5.15 Renesas R-Car V3U SoC (4)
3.5.16 Renesas R-Car V3U SoC (5)
3.5.17 Renesas R-Car V3H SoC (6)
3.5.24 Renesas R-Car V3M SoC(13)
3.5.25 Renesas Open Turnkey Solution
3.5.26 Renesas Software Platform: R-Car Software Development Kit
3.5.27 Renesas Software Platform: Cross-platform, Scalable and Reusable

3.6 Qualcomm
3.6.1 Operation of Qualcomm in 2021
3.6.2 Qualcomm Acquired Veoneer for $4.5 billion
3.6.3 Qualcomm and Veoneer's Partnership Began in 2021
3.6.4 Large Consumers of Veoneer
3.6.5 Veoneer Active Safety Platform Architecture
3.6.6 Veoneer L2+ Hands-off System
3.6.7 Veoneer ADAS SW Software Stack Roadmap
3.6.8 Qualcomm ADAS/AD Chip Products Portfolio
3.6.9 Qualcomm Snapdragon Ride SoC Chip
3.6.10 Qualcomm Snapdragon Ride SoC Chip: Topological Architecture
3.6.11 Qualcomm Snapdragon Ride SoC and the 4th-Gen Snapdragon Cockpit Chip
3.6.12 Qualcomm Snapdragon Ride? Vision System: Technical Features
3.6.13 Qualcomm Snapdragon Ride? Vision System: Mass Production in 2024
3.6.14 Qualcomm Autonomous Driving Solution: Snapdragon Ride Platform and Arriver Software Stack
3.6.15 Qualcomm Snapdragon Ride Autonomous Driving Platform
3.6.16 Qualcomm Snapdragon Ride Software Platform
3.6.17 Three Configuration Versions of Qualcomm Snapdragon Ride
3.6.18 Applications (1)
3.6.19 Applications (2)
3.6.20 Applications (3)
3.6.21 Applications (4)

3.7 Ambarella
3.7.1 Profile
3.7.2 Ambarella Acquired Oculii
3.7.3 Ambarella Autonomous Driving Chip Product Line and Development Strategy
3.7.4 Ambarella Computer Vision Chip Architecture: CVflow
3.7.5 Ambarella ADAS/AD Chip Products Portfolio
3.7.6 Ambarella Launched Latest AI Domain Controller Chip
3.7.7 CV3 Automotive SoC Architecture
3.7.8 CV3 Neural Network Processing Unit
3.7.9 Ambarella Will Launch Several CV3 Series Chips with Different Positioning
3.7.10 Autonomous Driving System Based on CV3 Single Chip
3.7.11 Ambarella CVflow? CV5 Series 
3.7.12 Ambarella Vision Chip CV1 Series
3.7.13 Ambarella Vision Chip CV2 Series: Framework Design
3.7.14 Ambarella Vision Chip CV2 Series: CV22AQ
3.7.15 Ambarella Vision Chip CV2 Series: CV22FS and CV2FS 
3.7.16 Many Automakers Build AD Systems Based on Ambarella CV2 SoC
3.7.17 Applied Scenarios of Ambarella Vision Chips and Its Partners

3.8 Infineon
3.8.1 Operation in 2021
3.8.2 Infineon becomes World's Largest Automotive Semiconductor Supplier with Cypress Acquisition
3.8.3 “New Infineon” Products Portfolio
3.8.4 Infineon Chip Products Portfolio
3.8.5 Infineon Autonomous Driving Chip Layout
3.8.6 Infineon Radar and LiDAR Products
3.8.7 Infineon Autonomous Driving Layout in Future
3.8.8 Infineon ADAS/AD Chip Products Portfolio
3.8.9 Infineon RXS8160PL Solution 
3.8.10 Infineon 77GHz Radar Chip

3.9 Xilinx
3.9.1 Xilinx Automotive Business
3.9.2 AMD Acquired Xilinx
3.9.3 Xilinx ADAS/AD Product Service Field
3.9.4 Xilinx FPGA Products Meet ADAS Sensor Trends
3.9.5 Roadmap and Layout of Xilinx FPGA Products
3.9.6 Xilinx ADAS/AD Chip Products Portfolio (1)
3.9.7 Xilinx ADAS/AD Chip Products Portfolio (2)
3.9.8 Xilinx Versal AE Edge Series for Next Generation Automotive Products
3.9.9 Xilinx Soc+FPGA Series
3.9.10 Xilinx Scalable Product Series
3.9.11 Xilinx Versal ACAP Series (1)
3.9.12 Xilinx Versal ACAP Series (2)
3.9.13 Xilinx Zynq UltraScale+ MPSoC Product Features (1)
3.9.14 Xilinx Zynq UltraScale+ MPSoC Product Features (2)
3.9.15 Autonomous Driving System Based on FPGA+CPU
3.9.16 Xilinx’s Launch of Unified Software Development Platform for AI and ML Inference
3.9.17 Xilinx Unified Software Development Platform (1)
3.9.18 Xilinx Unified Software Development Platform (2)
3.9.19 Xilinx’s Launch of Autonomous Driving System Architecture Solution
3.9.20 Xilinx FPGA Enabled Binocular Vision and 4D Radar
3.9.21 Xilinx FPGA Enabled LiDAR
3.9.22 Xilinx FPGA Enabled Intelligent Cockpit DMS/ICMS
3.9.23 Xilinx FPGA Enabled Autonomous Driving Sensor Fusion
3.9.24 Xilinx FPGA Enabled New Energy Vehicle
3.9.25 Xilinx FPGA Enabled Safe Gateway

3.10 Tesla
3.10.1 Tesla Autopilot System and Processor Evolution
3.10.2 Tesla ADASA/AD Computing Platform Products Portfolio
3.10.3 Tesla Planned to Outsource Production of HW 4.0 Autonomous Driving Chips to Samsung
3.10.4 Comparison of Technical Parameters of Tesla HW1.0-HW3.0
3.10.5 Tesla Self-developed HW3.0 FSD Chip
3.10.6 Tesla HW3.0: Chip Architecture Diagram
3.10.7 Tesla HW3.0 Chip: FSD Dual-redundancy Chip Design
3.10.8 Tesla HW3.0 Chip: CPU Processor
3.10.9 Tesla HW3.0 Chip: NNA Processor
3.10.10 Tesla HW3.0 Chip: ISP Processor
3.10.11 Tesla HW4.0 Chip May Cancel ISP Processor
3.10.12 Tesla Dojo Supercomputing Training Platform: Self-developed 7nm AI Training Chip D1
3.10.13 Tesla AI Supercomputer “ExaPOD”

Chapter 4 Research on Chinese AD Chip Vendors
4.1 Horizon Robotics
4.1.1 Business Model Positioned as Tier2 (1)
4.1.2 Business Model Positioned as Tier2 (2)
4.1.3 ADAS/AD Chip Architecture Roadmap 
4.1.4 Product Series: Chip, Tool Chain and Operating System
4.1.5 ADAS/AD Chip Products Portfolio (1)
4.1.6 ADAS/AD Chip Products Portfolio (2)
4.1.7 Journey 2/3/5 Series Products Technical Specifications Comparison 
4.1.8 Journey 5 Central Computing Chip: Core Performance Parameters
4.1.9 Journey 5 Achieved ISO 26262 ASIL-B Functional Safety Product Certification
4.1.10 Journey 3 Chip: Mainly for L2+ Assisted Driving
4.1.11 Journey 2 Chip (1)
4.1.12 Journey 2 Chip (2)
4.1.13 AD Computing Platform: Matrix
4.1.14 Reference Design Computing Platforms of Journey 5 and Matrix 5
4.1.15 Full-scenario Intelligent Driving Solutions Computing Platform: Matrix 5
4.1.16 Horizon Matrix? FSD Solution
4.1.17 Horizon Halo? Automotive Intelligent Interaction Solution
4.1.18 Horizon Matrix? Mono and Horizon Matrix? Pilot
4.1.19 Horizon Matrix Mono 2.0
4.1.20 Microkernel Architecture Real-time Automotive Operating System: Together OS (1)
4.1.21 Microkernel Architecture Real-time Automotive Operating System: Together OS (2)
4.1.22 Complete Development Tool Chain 
4.1.23 “Horizon OpenExplorer Platform” AI Development Platform
4.1.24 Data Closed-loop Development Platform
4.1.25 Consumers System 

4.2 Huawei
4.2.1 Huawei CC Architecture
4.2.2 Huawei ADAS/AD Chip Products Portfolio
4.2.3 Huawei ADAS/AD Computing Platform Products Portfolio
4.2.4 Huawei ADAS/AD Chip: Ascend 910/310 Master Chip
4.2.5 Huawei ADAS/AD Chip: Ascend 310/910 Using Huawei Self-developed Da Vinci Architecture
4.2.6 Huawei ADAS/AD Chip: Performance Parameters of Ascend 310
4.2.7 Huawei ADAS/AD Chip: Performance Parameters of Ascend 910
4.2.8 Huawei ADAS/AD Chip: Technical Planning Roadmap of Ascend Chip
4.2.9 Huawei CPU Chip: Kunpeng 916/920
4.2.10 Huawei MDC AD Computing Platform: Product Line
4.2.11 Huawei MDC AD Computing Platform: MDC810
4.2.12 Huawei MDC AD Computing Platform: MDC 210 and MDC 610 
4.2.13 Huawei MDC AD Computing Platform: Framework (1)
4.2.14 Huawei MDC AD Computing Platform: Framework (2)
4.2.15 Huawei MDC AD Computing Platform: Hardware Platform
4.2.16 Huawei MDC AD Computing Platform: Software & Tool Chain (1)
4.2.17 Huawei MDC AD Computing Platform: Software & Tool Chain (2)
4.2.18 Huawei MDC AD Computing Platform: Software & Tool Chain (3)
4.2.19 Huawei MDC AD Computing Platform: Software & Tool Chain (4)
4.2.20 Huawei MDC AD Computing Platform: Auto-grade Safety Platform
4.2.21 Huawei MDC AD Computing Platform: ISO26262 & ASPICE Certification
4.2.22 “HUAWEI Octopus” Open AD Platform Architecture (1)
4.2.23 “HUAWEI Octopus” Open AD Platform Architecture (2)
4.2.24 Huawei AI Computing Framework: MindSpore

4.3 Black Sesame Technologies
4.3.1 Profile
4.3.2 Black Sesame Chip Product Features and Positioning
4.3.3 Black Sesame Intelligent Perception SoC Architecture
4.3.4 Black Sesame Perception Platform Solutions
4.3.5 Two Core Competitive Advantages of Black Sesame
4.3.6 High-Computing Automotive Chip Product Technology Roadmap of Black Sesame
4.3.7 Black Sesame ADAS/AD Chip Products Portfolio (1)
4.3.8 Black Sesame ADAS/AD Chip Products Portfolio (2)
4.3.9 Black Sesame A1000L/ A1000/ A1000 Pro Chips Specification Parameters
4.3.10 Black Sesame Huashan 2 A1000 Pro Chip
4.3.11 Black Sesame Huashan 2 A1000/A1000L Chip (1)
4.3.12 Black Sesame Huashan 2 A1000/A1000L Chip (2)
4.3.13 Black Sesame FAD AD Computing Platform
4.3.14 Black Sesame Chip Intelligent Development Tools
4.3.15 Black Sesame Roadside Perception Computing Platform for Vehicle Infrastructure Cooperation
4.3.16 Black Sesame Provided Intelligent Driving Brain for FAW Hongqi

4.4 SemiDrive 
4.4.1 Profile
4.4.2 SemiDrive New Processor Product Line
4.4.3 SemiDrive AD Chip Roadmap
4.4.4 SemiDrive ADAS/AD Chip Products Portfolio (1)
4.4.5 SemiDrive ADAS/AD Chip Products Portfolio (2)
4.4.6 Comparison of SemiDrive V9L/V9F/V9T Chips Specification Parameters
4.4.7 SemiDrive AD Chip: Product Features of V9
4.4.8 SemiDrive AD Chip: Architecture of V9T SoC System
4.4.9 SemiDrive AD Platform: UniDrive
4.4.10 Ecological Partners of SemiDrive 

4.5 Dahua Leap Motor
4.5.1 Leap Motor 01 AD Chip: Technical Architecture and Features
4.5.2 Leap Motor 01 AD Chip: Technical Parameters


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